SEER for Integrated Circuits (SEER-IC)

SEER for Integrated Circuits (SEER-IC) simplifies the estimation of development and production costs for custom ICs, ASICs and FPGAs. While the SEER-H core includes functionality to estimate IC costs at the PCB and module level, dramatic increases in cost and complexity of custom components have made it necessary to estimate electronic components at a great level of specificity. SEER for ICs enables electronics specialists to develop accurate and reliable estimates specifying FPGA input variables such as Active I/O Pins per Chip, Clock Speed or Frequency, Active Logic Cells, New Design %, Front and Back-end Complexity, and more. ASIC input variables include Process; Die Area; Feature Size (nanometers); Effective Gates per Die, Logic; Memory, and IP Logic Gates and Complexity; and more than 15 additional parameters.

For more information, check out our full SEER-IC sheet.

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